Unverified Commit 2467b36a authored by George Oikonomou's avatar George Oikonomou Committed by GitHub
Browse files

Merge pull request #257 from g-oikonomou/contrib/gpio-hal

Add GPIO Hardware Abstraction Layer
parents fa921150 e30423f6
......@@ -17,7 +17,7 @@ CONTIKI_CPU_DIRS = . dev usb usb/common usb/common/cdc-acm
CONTIKI_CPU_SOURCEFILES += soc.c clock.c rtimer-arch.c uart.c watchdog.c
CONTIKI_CPU_SOURCEFILES += nvic.c sys-ctrl.c gpio.c ioc.c spi.c adc.c
CONTIKI_CPU_SOURCEFILES += crypto.c aes.c ecb.c cbc.c ctr.c cbc-mac.c gcm.c
CONTIKI_CPU_SOURCEFILES += ccm.c sha256.c
CONTIKI_CPU_SOURCEFILES += ccm.c sha256.c gpio-hal-arch.c
CONTIKI_CPU_SOURCEFILES += cc2538-aes-128.c cc2538-ccm-star.c
CONTIKI_CPU_SOURCEFILES += cc2538-rf.c udma.c lpm.c int-master.c
CONTIKI_CPU_SOURCEFILES += pka.c bignum-driver.c ecc-driver.c ecc-algorithm.c
......
......@@ -64,6 +64,8 @@
/* Path to headers with implementation of mutexes and memory barriers */
#define MUTEX_CONF_ARCH_HEADER_PATH "mutex-cortex.h"
#define MEMORY_BARRIER_CONF_ARCH_HEADER_PATH "memory-barrier-cortex.h"
#define GPIO_HAL_CONF_ARCH_HDR_PATH "dev/gpio-hal-arch.h"
/*---------------------------------------------------------------------------*/
#endif /* CC2538_DEF_H_ */
/*---------------------------------------------------------------------------*/
/*
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*---------------------------------------------------------------------------*/
/**
* \addtogroup cc2538-gpio-hal
* @{
*
* \file
* Implementation file for the CC2538 GPIO HAL functions
*/
/*---------------------------------------------------------------------------*/
#include "contiki.h"
#include "dev/gpio-hal.h"
#include "dev/gpio.h"
#include "dev/ioc.h"
#include <stdint.h>
/*---------------------------------------------------------------------------*/
void
gpio_hal_arch_pin_cfg_set(gpio_hal_pin_t pin, gpio_hal_pin_cfg_t cfg)
{
uint8_t port, pin_num, pin_mask;
uint32_t port_base;
port = PIN_TO_PORT(pin);
port_base = PIN_TO_PORT_BASE(pin);
pin_num = pin % 8;
pin_mask = GPIO_PIN_MASK(pin_num);
gpio_hal_pin_cfg_t tmp;
tmp = cfg & GPIO_HAL_PIN_CFG_EDGE_BOTH;
if(tmp == GPIO_HAL_PIN_CFG_EDGE_NONE) {
GPIO_DISABLE_INTERRUPT(port_base, pin_mask);
} else if(tmp == GPIO_HAL_PIN_CFG_EDGE_RISING) {
GPIO_DETECT_EDGE(port_base, pin_mask);
GPIO_TRIGGER_SINGLE_EDGE(port_base, pin_mask);
GPIO_DETECT_RISING(port_base, pin_mask);
} else if(tmp == GPIO_HAL_PIN_CFG_EDGE_FALLING) {
GPIO_DETECT_EDGE(port_base, pin_mask);
GPIO_TRIGGER_SINGLE_EDGE(port_base, pin_mask);
GPIO_DETECT_FALLING(port_base, pin_mask);
} else if(tmp == GPIO_HAL_PIN_CFG_EDGE_BOTH) {
GPIO_DETECT_EDGE(port_base, pin_mask);
GPIO_TRIGGER_BOTH_EDGES(port_base, pin_mask);
}
tmp = cfg & GPIO_HAL_PIN_CFG_PULL_MASK;
if(tmp == GPIO_HAL_PIN_CFG_PULL_NONE) {
ioc_set_over(port, pin_num, IOC_OVERRIDE_DIS);
} else if(tmp == GPIO_HAL_PIN_CFG_PULL_DOWN) {
ioc_set_over(port, pin_num, IOC_OVERRIDE_PDE);
} else if(tmp == GPIO_HAL_PIN_CFG_PULL_UP) {
ioc_set_over(port, pin_num, IOC_OVERRIDE_PUE);
}
tmp = cfg & GPIO_HAL_PIN_CFG_INT_MASK;
if(tmp == GPIO_HAL_PIN_CFG_INT_DISABLE) {
GPIO_DISABLE_INTERRUPT(port_base, pin_mask);
} else if(tmp == GPIO_HAL_PIN_CFG_INT_ENABLE) {
GPIO_ENABLE_INTERRUPT(port_base, pin_mask);
}
GPIO_SOFTWARE_CONTROL(port_base, pin_mask);
}
/*---------------------------------------------------------------------------*/
gpio_hal_pin_cfg_t
gpio_hal_arch_pin_cfg_get(gpio_hal_pin_t pin)
{
uint8_t port, pin_num, pin_mask;
uint32_t port_base;
gpio_hal_pin_cfg_t cfg;
uint32_t tmp;
port = PIN_TO_PORT(pin);
port_base = PIN_TO_PORT_BASE(pin);
pin_num = pin % 8;
pin_mask = GPIO_PIN_MASK(pin_num);
cfg = 0;
/* Pull */
tmp = ioc_get_over(port, pin_num);
if(tmp == IOC_OVERRIDE_PUE) {
cfg |= GPIO_HAL_PIN_CFG_PULL_UP;
} else if(tmp == IOC_OVERRIDE_PDE) {
cfg |= GPIO_HAL_PIN_CFG_PULL_DOWN;
} else {
cfg |= GPIO_HAL_PIN_CFG_PULL_NONE;
}
/* Interrupt enable/disable */
tmp = REG((port_base) + GPIO_IE) & pin_mask;
if(tmp == 0) {
cfg |= GPIO_HAL_PIN_CFG_INT_DISABLE;
} else {
cfg |= GPIO_HAL_PIN_CFG_INT_ENABLE;
}
/* Edge detection */
if(REG((port_base) + GPIO_IS) & pin_mask) {
cfg |= GPIO_HAL_PIN_CFG_EDGE_NONE;
} else {
if(REG((port_base) + GPIO_IBE) & pin_mask) {
cfg |= GPIO_HAL_PIN_CFG_EDGE_BOTH;
} else {
if(REG((port_base) + GPIO_IEV) & pin_mask) {
cfg |= GPIO_HAL_PIN_CFG_EDGE_RISING;
} else {
cfg |= GPIO_HAL_PIN_CFG_EDGE_FALLING;
}
}
}
return cfg;
}
/*---------------------------------------------------------------------------*/
void
gpio_hal_arch_write_pin(gpio_hal_pin_t pin, uint8_t value)
{
if(value == 1) {
gpio_hal_arch_set_pin(pin);
return;
}
gpio_hal_arch_clear_pin(pin);
}
/*---------------------------------------------------------------------------*/
void
gpio_hal_arch_set_pins(gpio_hal_pin_mask_t pins)
{
GPIO_SET_PIN(GPIO_A_BASE, pins & 0xFF);
GPIO_SET_PIN(GPIO_B_BASE, (pins >> 8) & 0xFF);
GPIO_SET_PIN(GPIO_C_BASE, (pins >> 16) & 0xFF);
GPIO_SET_PIN(GPIO_D_BASE, (pins >> 24) & 0xFF);
}
/*---------------------------------------------------------------------------*/
void
gpio_hal_arch_clear_pins(gpio_hal_pin_mask_t pins)
{
GPIO_CLR_PIN(GPIO_A_BASE, pins & 0xFF);
GPIO_CLR_PIN(GPIO_B_BASE, (pins >> 8) & 0xFF);
GPIO_CLR_PIN(GPIO_C_BASE, (pins >> 16) & 0xFF);
GPIO_CLR_PIN(GPIO_D_BASE, (pins >> 24) & 0xFF);
}
/*---------------------------------------------------------------------------*/
gpio_hal_pin_mask_t
gpio_hal_arch_read_pins(gpio_hal_pin_mask_t pins)
{
gpio_hal_pin_mask_t rv = 0;
rv |= GPIO_READ_PIN(GPIO_A_BASE, pins & 0xFF);
rv |= GPIO_READ_PIN(GPIO_B_BASE, (pins >> 8) & 0xFF) << 8;
rv |= GPIO_READ_PIN(GPIO_C_BASE, (pins >> 16) & 0xFF) << 16;
rv |= GPIO_READ_PIN(GPIO_D_BASE, (pins >> 24) & 0xFF) << 24;
return rv;
}
/*---------------------------------------------------------------------------*/
void
gpio_hal_arch_write_pins(gpio_hal_pin_mask_t pins, gpio_hal_pin_mask_t value)
{
GPIO_WRITE_PIN(GPIO_A_BASE, pins & 0xFF, value & 0xFF);
GPIO_WRITE_PIN(GPIO_B_BASE, (pins >> 8) & 0xFF, (value >> 8) & 0xFF);
GPIO_WRITE_PIN(GPIO_C_BASE, (pins >> 16) & 0xFF, (value >> 16) & 0xFF);
GPIO_WRITE_PIN(GPIO_D_BASE, (pins >> 24) & 0xFF, (value >> 24) & 0xFF);
}
/*---------------------------------------------------------------------------*/
/** @} */
/*
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*---------------------------------------------------------------------------*/
/**
* \addtogroup cc2538
* @{
*
* \defgroup cc2538-gpio-hal CC2538 GPIO HAL implementation
*
* @{
*
* \file
* Header file for the CC2538 GPIO HAL functions
*
* \note
* Do not include this header directly
*/
/*---------------------------------------------------------------------------*/
#ifndef GPIO_HAL_ARCH_H_
#define GPIO_HAL_ARCH_H_
/*---------------------------------------------------------------------------*/
#include "contiki.h"
#include "dev/gpio.h"
#include <stdint.h>
/*---------------------------------------------------------------------------*/
#define PIN_TO_PORT(pin) (pin >> 3)
#define PIN_TO_PORT_BASE(pin) GPIO_PORT_TO_BASE(PIN_TO_PORT(pin))
/*---------------------------------------------------------------------------*/
#define gpio_hal_arch_interrupt_enable(p) \
GPIO_ENABLE_INTERRUPT(PIN_TO_PORT_BASE(p), GPIO_PIN_MASK((p) % 8))
#define gpio_hal_arch_interrupt_disable(p) \
GPIO_DISABLE_INTERRUPT(PIN_TO_PORT_BASE(p), GPIO_PIN_MASK((p) % 8))
#define gpio_hal_arch_pin_set_input(p) do { \
GPIO_SOFTWARE_CONTROL(PIN_TO_PORT_BASE(p), GPIO_PIN_MASK((p) % 8)); \
GPIO_SET_INPUT(PIN_TO_PORT_BASE(p), GPIO_PIN_MASK((p) % 8)); \
} while(0);
#define gpio_hal_arch_pin_set_output(p) do { \
GPIO_SOFTWARE_CONTROL(PIN_TO_PORT_BASE(p), GPIO_PIN_MASK((p) % 8)); \
GPIO_SET_OUTPUT(PIN_TO_PORT_BASE(p), GPIO_PIN_MASK((p) % 8)); \
} while(0);
#define gpio_hal_arch_set_pin(p) \
GPIO_SET_PIN(PIN_TO_PORT_BASE(p), GPIO_PIN_MASK((p) % 8))
#define gpio_hal_arch_clear_pin(p) \
GPIO_CLR_PIN(PIN_TO_PORT_BASE(p), GPIO_PIN_MASK((p) % 8))
#define gpio_hal_arch_read_pin(p) \
(GPIO_READ_PIN(PIN_TO_PORT_BASE(p), GPIO_PIN_MASK((p) % 8)) == 0 ? 0 : 1)
/*---------------------------------------------------------------------------*/
#endif /* GPIO_HAL_ARCH_H_ */
/*---------------------------------------------------------------------------*/
/**
* @}
* @}
*/
......@@ -37,46 +37,13 @@
*/
#include "contiki.h"
#include "dev/leds.h"
#include "dev/gpio-hal.h"
#include "dev/gpio.h"
#include "dev/nvic.h"
#include "reg.h"
#include "lpm.h"
#include <string.h>
/**
* \brief Pointer to a function to be called when a GPIO interrupt is detected.
* Callbacks for Port A, Pins[0:7] are stored in positions [0:7] of this
* buffer, Port B callbacks in [8:15] and so on
*/
static gpio_callback_t gpio_callbacks[32];
/*---------------------------------------------------------------------------*/
void
gpio_register_callback(gpio_callback_t f, uint8_t port, uint8_t pin)
{
gpio_callbacks[(port << 3) + pin] = f;
}
/*---------------------------------------------------------------------------*/
/** \brief Run through all registered GPIO callbacks and invoke those
* associated with the \a port and the pins specified by \a mask
* \param mask Search callbacks associated with pins specified by this mask
* \param port Search callbacks associated with this port. Here, port is
* specified as a number between 0 and 3. Port A: 0, Port B: 1 etc */
void
notify(uint8_t mask, uint8_t port)
{
uint8_t i;
gpio_callback_t *f = &gpio_callbacks[port << 3];
for(i = 0; i < 8; i++) {
if(mask & (1 << i)) {
if((*f) != NULL) {
(*f)(port, i);
}
}
f++;
}
}
/*---------------------------------------------------------------------------*/
/** \brief Interrupt service routine for Port \a port
* \param port Number between 0 and 3. Port A: 0, Port B: 1, etc.
......@@ -93,7 +60,7 @@ gpio_port_isr(uint8_t port)
int_status = GPIO_GET_MASKED_INT_STATUS(base);
power_up_int_status = GPIO_GET_POWER_UP_INT_STATUS(port);
notify(int_status | power_up_int_status, port);
gpio_hal_event_handler((int_status | power_up_int_status) << (port << 3));
GPIO_CLEAR_INTERRUPT(base, int_status);
GPIO_CLEAR_POWER_UP_INTERRUPT(port, power_up_int_status);
......@@ -110,9 +77,4 @@ GPIO_PORT_ISR(b, B)
GPIO_PORT_ISR(c, C)
GPIO_PORT_ISR(d, D)
/*---------------------------------------------------------------------------*/
void
gpio_init()
{
memset(gpio_callbacks, 0, sizeof(gpio_callbacks));
}
/** @} */
......@@ -42,27 +42,12 @@
*/
#ifndef GPIO_H_
#define GPIO_H_
/*---------------------------------------------------------------------------*/
#include "contiki.h"
#include "dev/gpio-hal.h"
#include "reg.h"
#include <stdint.h>
/**
* \brief Type definition for callbacks invoked by the GPIO ISRs
* \param port The port that triggered the GPIO interrupt. \e port is passed
* by its numeric representation (Port A:0, B:1 etc). Defines for
* these numeric representations are GPIO_x_NUM
* \param pin The pin that triggered the interrupt, specified by number
* (0, 1, ..., 7)
*
* This is the prototype of a function pointer passed to
* gpio_register_callback(). These callbacks are registered on a port/pin
* basis. When a GPIO port generates an interrupt, if a callback has been
* registered for the port/pin combination, the ISR will invoke it. The ISR
* will pass the port/pin as arguments in that call, so that a developer can
* re-use the same callback for multiple port/pin combinations
*/
typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
/*---------------------------------------------------------------------------*/
/** \name Base addresses for the GPIO register instances
* @{
......@@ -612,21 +597,6 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
#define GPIO_IRQ_DETECT_UNMASK_PAIACK0 0x00000001 /**< Port A bit 0 */
/** @} */
/*---------------------------------------------------------------------------*/
/** \brief Initialise the GPIO module */
void gpio_init();
/**
* \brief Register GPIO callback
* \param f Pointer to a function to be called when \a pin of \a port
* generates an interrupt
* \param port Associate \a f with this port. \e port must be specified with
* its numeric representation (Port A:0, B:1 etc). Defines for these
* numeric representations are GPIO_x_NUM
* \param pin Associate \a f with this pin, which is specified by number
* (0, 1, ..., 7)
*/
void gpio_register_callback(gpio_callback_t f, uint8_t port, uint8_t pin);
#endif /* GPIO_H_ */
/**
......
......@@ -56,6 +56,12 @@ ioc_set_over(uint8_t port, uint8_t pin, uint8_t over)
ioc_over[(port << 3) + pin] = over;
}
/*---------------------------------------------------------------------------*/
uint32_t
ioc_get_over(uint8_t port, uint8_t pin)
{
return ioc_over[(port << 3) + pin] & 0x0F;
}
/*---------------------------------------------------------------------------*/
void
ioc_set_sel(uint8_t port, uint8_t pin, uint8_t sel)
{
......
......@@ -249,6 +249,22 @@ void ioc_init();
*/
void ioc_set_over(uint8_t port, uint8_t pin, uint8_t over);
/**
* \brief Get Port:Pin override function
* \param port The port as a number (PA: 0, PB: 1 etc)
* \param pin The pin as a number
* \return The override function
*
* The return value can be one of
*
* - IOC_OVERRIDE_OE: Output
* - IOC_OVERRIDE_PUE: Pull-Up
* - IOC_OVERRIDE_PDE: Pull-Down
* - IOC_OVERRIDE_ANA: Analog
* - IOC_OVERRIDE_DIS: Disabled
*/
uint32_t ioc_get_over(uint8_t port, uint8_t pin);
/**
* \brief Function select for Port:Pin
* \param port The port as a number (PA: 0, PB: 1 etc)
......
......@@ -41,6 +41,7 @@
#include "dev/ioc.h"
#include "dev/nvic.h"
#include "dev/sys-ctrl.h"
#include "dev/gpio-hal.h"
#include "lpm.h"
#include "reg.h"
#include "soc.h"
......@@ -123,7 +124,7 @@ soc_init()
clock_init();
lpm_init();
rtimer_init();
gpio_init();
gpio_hal_init();
}
/*----------------------------------------------------------------------------*/
/** @} */
......@@ -32,7 +32,7 @@ CONTIKI_CPU_SOURCEFILES += clock.c rtimer-arch.c soc-rtc.c uart.c
CONTIKI_CPU_SOURCEFILES += contiki-watchdog.c aux-ctrl.c
CONTIKI_CPU_SOURCEFILES += putchar.c ieee-addr.c batmon-sensor.c adc-sensor.c
CONTIKI_CPU_SOURCEFILES += slip-arch.c slip.c cc26xx-uart.c lpm.c
CONTIKI_CPU_SOURCEFILES += gpio-interrupt.c oscillators.c
CONTIKI_CPU_SOURCEFILES += gpio-interrupt.c gpio-hal-arch.c oscillators.c
CONTIKI_CPU_SOURCEFILES += rf-core.c rf-ble.c ieee-mode.c
CONTIKI_CPU_SOURCEFILES += random.c soc-trng.c int-master.c
......
......@@ -99,6 +99,10 @@
/* Path to headers with implementation of mutexes and memory barriers */
#define MUTEX_CONF_ARCH_HEADER_PATH "mutex-cortex.h"
#define MEMORY_BARRIER_CONF_ARCH_HEADER_PATH "memory-barrier-cortex.h"
#define GPIO_HAL_CONF_ARCH_HDR_PATH "dev/gpio-hal-arch.h"
/*---------------------------------------------------------------------------*/
#define GPIO_HAL_CONF_ARCH_SW_TOGGLE 0
/*---------------------------------------------------------------------------*/
#endif /* CC13XX_CC26XX_DEF_H_ */
/*---------------------------------------------------------------------------*/
......@@ -39,7 +39,6 @@
#include "contiki.h"
#include "lib/sensors.h"
#include "dev/adc-sensor.h"
#include "gpio-interrupt.h"
#include "sys/timer.h"
#include "lpm.h"
......
/*
* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*---------------------------------------------------------------------------*/
/**
* \addtogroup cc26xx-gpio-hal
* @{
*
* \file
* Implementation file for the CC13xx/CC26xx GPIO HAL functions
*/
/*---------------------------------------------------------------------------*/
#include "contiki.h"
#include "ti-lib.h"
#include "ti-lib-rom.h"
#include "dev/gpio-hal.h"
#include <stdint.h>
/*---------------------------------------------------------------------------*/
#define CONFIG_MASK (IOC_IOPULL_M | IOC_INT_M | IOC_IOMODE_OPEN_SRC_INV)
/*---------------------------------------------------------------------------*/
void
gpio_hal_arch_pin_cfg_set(gpio_hal_pin_t pin, gpio_hal_pin_cfg_t cfg)
{
uint32_t config;
gpio_hal_pin_cfg_t tmp;
/* Clear settings that we are about to change, keep everything else */
config = ti_lib_rom_ioc_port_configure_get(pin);
config &= ~CONFIG_MASK;
tmp = cfg & GPIO_HAL_PIN_CFG_EDGE_BOTH;
if(tmp == GPIO_HAL_PIN_CFG_EDGE_NONE) {
config |= IOC_NO_EDGE;
} else if(tmp == GPIO_HAL_PIN_CFG_EDGE_RISING) {
config |= IOC_RISING_EDGE;
} else if(tmp == GPIO_HAL_PIN_CFG_EDGE_FALLING) {
config |= IOC_FALLING_EDGE;
} else if(tmp == GPIO_HAL_PIN_CFG_EDGE_BOTH) {
config |= IOC_BOTH_EDGES;
}
tmp = cfg & GPIO_HAL_PIN_CFG_PULL_MASK;
if(tmp == GPIO_HAL_PIN_CFG_PULL_NONE) {
config |= IOC_NO_IOPULL;
} else if(tmp == GPIO_HAL_PIN_CFG_PULL_DOWN) {
config |= IOC_IOPULL_DOWN;
} else if(tmp == GPIO_HAL_PIN_CFG_PULL_UP) {
config |= IOC_IOPULL_UP;
}
tmp = cfg & GPIO_HAL_PIN_CFG_INT_MASK;
if(tmp == GPIO_HAL_PIN_CFG_INT_DISABLE) {
config |= IOC_INT_DISABLE;
} else if(tmp == GPIO_HAL_PIN_CFG_INT_ENABLE) {
config |= IOC_INT_ENABLE;
}
ti_lib_rom_ioc_port_configure_set(pin, IOC_PORT_GPIO, config);
}
/*---------------------------------------------------------------------------*/
gpio_hal_pin_cfg_t
gpio_hal_arch_pin_cfg_get(gpio_hal_pin_t pin)
{
gpio_hal_pin_cfg_t cfg;
uint32_t tmp;
uint32_t config;
cfg = 0;
config = ti_lib_rom_ioc_port_configure_get(pin);
/* Pull */
tmp = config & IOC_IOPULL_M;
if(tmp == IOC_IOPULL_UP) {
cfg |= GPIO_HAL_PIN_CFG_PULL_UP;
} else if(tmp == IOC_IOPULL_DOWN) {